This invention relates to an interruption controlling system for controlling a processing interruption request signal.
An interruption controlling system of the type described, generally comprises an interruption request signal line, a main processor unit connected to the interruption request signal line, and first through N-th peripheral units, each connected to the interruption request signal line, where N represents an integer greater than one. The interruption controlling system is for controlling the processing interruption request signal which is produced by each of the first through the N-th peripheral units for the main processor unit to be supplied to the interruption request signal line.
The main processor unit comprises a main processor connected to the interruption request signal line for accepting, as an accepted interruption request signal, the processing interruption request signal from the interruption request signal line.
The first through the N-th peripheral units are similar in structure to each other. Each of the first through the N-th peripheral units comprises a subsidiary processor for producing an original interruption request signal.
As will later be described, each of the first through the N-th peripheral units has input and output interruption control terminals in a conventional interruption controlling system. The output interruption control terminal of the first peripheral unit is connected to the input interruption control terminal of the second peripheral unit. Likewise, the output interruption control terminal of the (N-1)-th peripheral unit is connected to the input interruption control terminal of the N-th peripheral unit.
Merely for brevity of description, it will be assumed that N is equal to four and that the subsidiary processor of a second peripheral unit succeeding the first peripheral unit produces the original interruption request signal. In this case, the second peripheral unit processes the original interruption request signal into an interruption control signal of a low level to continuously supply the interruption control signal to the output interruption control terminal of the second peripheral unit unless the input interruption control terminal of the second peripheral unit is already supplied with the interruption control signal of the low level.
While a third peripheral unit succeeding the second peripheral unit receives the interruption control signal of the low level through the input interruption control terminal of the third peripheral unit from the output interruption control terminal of the second peripheral unit, the third peripheral unit continuously supplies the interruption control signal of the low level to the output interruption control terminal of the third peripheral unit to thereby supply the interruption control signal of the low level to the input interruption control terminal of the fourth peripheral unit.
Thereafter, the second peripheral unit processes the original interruption request signal into the processing interruption request signal to continuously supply the processing interruption request signal to the interruption request signal line unless the input interruption control terminal of the second peripheral unit is already supplied with the interruption control signal of the low level.
With this structure, the first peripheral unit has a highest priority of interruption. The second peripheral unit has a highest priority of interruption except the first peripheral unit. The fourth peripheral unit has a lowest priority among the first through the fourth peripheral units. Such priorities of interruption for the peripheral units are determined by connecting relationship among the peripheral units.
Inasmuch as an interruption control signal line is necessary in connecting the output interruption control terminal of the first peripheral unit to the input interruption control terminal of the second peripheral unit independently of a different interruption control signal line which is necessary in connecting the output interruption control terminal of the second peripheral unit to the input interruption control terminal of the third peripheral unit, connection between the peripheral units by using the interruption control signal lines is inevitably complicated as the number of the peripheral units increases. From this viewpoint, it is desirable to provide an interruption controlling system wherein the priorities of interruption for the peripheral units are determined independently of the connecting relationship among the peripheral units.